| System Features |
| 1. |
2K x 16bits OTP program memory for both FPP units |
| 2. |
160 Bytes data RAM for both FPP units |
| 3. |
One hardware 16-bit timer |
| 4. |
Support fast wake-up |
| 5. |
18 IO pins with 10mA driving / sink capability |
| 6. |
Every IO pin can be configured to enable wake-up function |
| 7. |
Band-gap circuit to provide 1.20V reference voltage |
| 8. |
Up to 10-channel 12-bit resolution ADC with 1-channel for internal band-gap reference voltage |
| 9. |
One hardware 8-bit timer with PWM generator |
| 10. |
Provide software configurable LCD driver IO with optional VDD/2 LCD bias voltage |
| 11. |
Provide maximum 4x13 dots LCD display |
| 12. |
Operating voltage range: 2.2V ~ 5.5V |
| 13. |
Clock sources: External crystal oscillator，internal high RC oscillator and internal low RC oscillator |
| 14. |
Eight levels of LVD reset： 4.1V, 3.6V, 3.1V, 2.8V, 2.5V, 2.2V, 2.0V, 1.8V |
| 15. |
Two external interrupt pins |
| |
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| CPU Features |
| 1. |
Operating modes: Two processing units FPPATM mode or Traditional one processing unit mode |
| 2. |
100 powerful instructions |
| 3. |
Most instructions are 1T execution cycle |
| 4. |
Programmable stack pointer and adjustable stack level |
| 5. |
Direct and indirect addressing modes for data access. Data memories are available for use as an index pointer of Indirect addressing mode |
| 6. |
Separated IO space and memory space |