| System Features |
| 1. |
1.5KW OTP program memory |
| 2. |
96 Bytes data RAM |
| 3. |
Clock sources: internal high RC oscillator, internal low RC oscillator and external crystal oscillator u |
| 4. |
Band-gap circuit to provide 1.20V reference voltage |
| 5. |
One hardware 16-bit timer |
| 6. |
Two hardware 8-bit timers with PWM generator |
| 7. |
One hardware comparator |
| 8. |
Up to 11-channel 12-bit resolution ADC with one channel comes from band gap voltage |
| 9. |
Provide ADC reference high voltage: external input, internal VDD |
| 10. |
Eight levels of LVR reset： 4.0V, 3.5V, 3.0V, 2.7V, 2.5V, 2.2V, 2.0V, 1.8V |
| 11. |
Max 14 IO pins with optional pull-high resistor, two of them with additional pull-low resistor |
| 12. |
PB0 provides NMOS and PB7 provides PMOS super large current output (typ. 125mA@VDD=5.0V) |
| 13. |
Two selectable external interrupt pins by code option |
| 14. |
Every IO pin can be configured to enable wake-up function u |
| 15. |
For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast |
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| CPU Features |
| 1. |
One processing unit operating mode |
| 2. |
82 powerful instructions |
| 3. |
Most instructions are 1T execution cycle |
| 4. |
Programmable stack pointer and adjustable stack level |
| 5. |
Direct and indirect addressing modes for data access. Data memories are available for use as an index pointer of indirect addressing mode |
| 6. |
IO space and memory space are independent |
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