| System Features |
| 1. |
1.5KW MTP program memory |
| 2. |
128 Bytes data SRAM |
| 3. |
128 Bytes EEPROM |
| 4. |
One hardware 16-bit timer |
| 5. |
One hardware 8-bit timers with 6/7/8-bit PWM generation |
| 6. |
One set triple 11bit SuLED (Super LED) PWM generators and timers |
| 7. |
One hardware comparator |
| 8. |
8 IO pins with optional pull-high / pull-low resistor |
| 9. |
Every IO pin can be configured to enable wake-up function |
| 10. |
Two different IO Driving capability group to meet different application requirements |
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Every IO Drive/ Sink Current= 40mA/50mA (Strong) and 5mA/10mA (Normal) |
| 11. |
Clock sources: IHRC, ILRC & EOSC(XTAL mode) |
| 12. |
Built-in crystal oscillator capacitance, Disable / 7pF/ 9.5pF / 12.5pF are available |
| 13. |
For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast |
| 14. |
Eight levels of LVR: 4.0V, 3.5V, 3.0V, 2.7V, 2.5V, 2.2V, 2.0V and 1.8V |
| 15. |
Two selectable external interrupt pins by code option |
| 16. |
Bandgap circuit to provide 1.20V reference voltage |
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| CPU Features |
| 1. |
One processing unit operating mode |
| 2. |
88 powerful instructions |
| 3. |
Most instructions are 1T execution cycle |
| 4. |
Programmable stack pointer to provide adjustable stack level |
| 5. |
Direct and indirect addressing modes for data access. Data memories are available for use as an index pointer of Indirect addressing mode |
| 6. |
IO space and memory space are independent |
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